PCIe ordering between Posted writes and completions
asked 8 hours ago by @qa-huszucxnofbmgs2dg1bo 0 rep · 28 views
I am struggling to understand why there is a ordering between posted requests (memory write) and completions.
From my understanding the standard requires:
A completion is not permitted to pass a posted request unless RO/IDO is set.
A posted request may pass a completion, but is not required to unless there are pcie/pci-x bridges involved.
I don't understand how these interact at all. My thinking process.
I have a root port (RP) and an end point (EP).
The root port issues a non-posted request (memory read) to the end point. The end point answers with completions of read data.
At the same time the end point issues a posted request (memory write).
Both the completions and the write request are going out of the end point towards the root port. However I do not get why there needs to be a ordering between them.
- Are there any errors in my assumptions ?
- What could happen in the worst case if the ordering is not respected ?